IEEE 1532-2001

$83.42

IEEE Standard for In-System Configuration of Programmable Devices

Published By	Publication Date	Number of Pages
IEEE	2001	139

Guaranteed Safe Checkout

Category: IEEE

If you have any questions, feel free to reach out to our online customer service team by clicking on the bottom right corner. We’re here to assist you 24/7.
Email:[email protected]

Description

Revision Standard – Superseded. The communication protocol described by IEEE Std 1149.1 (Standard Test Access Port and Boundary-Scan Architecture) has been adopted by this standard for providing standardized programming access and methodology for programmable integrated circuit devices. Devices that implement this standard shall first be compliant with IEEE Std 1149.1 used for testing purposes. A device, or set of devices implementing this standard may be programmed (written), read back, erased, and verified, singly or concurrently, with a standardized set of resources. Sample implementation and application details (which are not part of this standard) are included for illustrative purposes.

PDF Catalog

PDF Pages	PDF Title
2	IEEE Standard for In-System Con •guration of Programmable Devices
4	Introduction
5	Participants
7	Contents
10	1. Overview 1.1 Scope 1.2 Organization of the standard
11	1.3 Context 1.4 Objectives
12	2. References 3. Definitions and acronyms 3.1 Definitions
17	3.2 Acronyms
18	4. System modal states
19	4.1 Definition of system modal states
20	4.2 Description of system modal state transitions
23	4.3 System modal state transition timing
25	4.4 System I/O pin behavior
31	5. ISC architecture 5.1 Overview
42	5.2 Specification
45	5.3 Description 6. ISC instructions
46	6.1 General properties of ISC instructions
51	6.2 Mandatory ISC instructions
57	6.3 Optional ISC programming instructions
63	6.4 Optional ISC program control/security instructions
66	6.5 Optional address/data access instructions
71	6.6 Requirements for 1149.1 masters and ISC programming algorithms
72	6.7 Adding new instructions for ISC programming support
73	7. Data registers
74	7.1 Device identification
75	7.2 Bypass register 7.3 Boundary-scan register 7.4 ISC_Default
76	7.5 ISC_Config
77	7.6 ISC_PData 7.7 ISC_RData 7.8 ISC_Sector 7.9 ISC_Info 7.10 ISC_Data
78	7.11 ISC_Address 7.12 ISC_Inc 8. Conformance and documentation requirements 8.1 Conformance
79	8.2 Documentation
81	8.3 BSDL extension for ISC description (STD_1532_2001)
82	8.4 ISC extension structure
83	8.5 ISC BSDL attribute definitions
110	9. Data file format 9.1 Data file syntax specification
113	9.2 Description
114	9.3 Mapping data onto a flow
115	9.4 Merging flows for concurrent programming
117	9.5 Data file transmission CRC calculation
119	Annex A
123	Annex B
132	Annex C