IEEE 2401-2019

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IEEE Standard Format for LSI-Package-Board Interoperable Design

Published By	Publication Date	Number of Pages
IEEE	2019	293

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Description

Revision Standard – Active. A method is provided for specifying a common interoperable format for electronic systems design. The format provides a common way to specify information/data about the project management, netlists, components, design rules, and geometries used in the large-scale integration-package-board designs. The method provides the ability to make electronic systems a key consideration early in the design process; design tools can use it to seamlessly exchange information/data.

PDF Catalog

PDF Pages	PDF Title
1	IEEE Std 2401™-2019 front cover
2	Title page
12	1. Overview 1.1 Scope 1.2 Purpose 1.3 Key characteristics of the LSI-Package-Board Format
13	1.4 Contents of this standard
14	1.5 Word usage 2. Normative references 3. Definitions, acronyms, and abbreviations 3.1 Definitions
17	3.2 Acronyms and abbreviations
19	4. Concept of the LPB Format 4.1 Technical background 4.2 Conventional design
20	4.3 Common problems at the design site 4.4 Concept of LPB interoperable design 4.5 Value creation by LPB interoperable design
22	4.6 LPB Format 4.7 Summary of LPB Format files
28	5. Language basics 5.1 General 5.2 Typographic and syntax conventions
29	5.3 Character information 5.4 Notation of the floating point number 5.5 File naming definitions
30	6. Common elements in M-Format, C-Format, and R-Format 6.1 General 6.2 The element
31	6.3 The element
33	6.4 The element
49	7. M-Format 7.1 M-Format file structure
50	7.2 The element 7.3 The element
51	7.4 The element
57	8. C-Format 8.1 C-Format file structure 8.2 The element
162	8.3 The element
166	9. R-Format 9.1 R-Format file structure
167	9.2 The element
202	9.3 The element
212	10. N-Format 10.1 Purpose of the N-Format file 10.2 How to identify the power/ground network
213	10.3 Example 11. G-Format 11.1 Language basics of G-Format
214	11.2 Structure
215	11.3 Header section
216	11.4 Material section 11.5 Layer section
217	11.6 Shape section
221	11.7 Board geometry section
222	11.8 Padstack section
223	11.9 Part section
225	11.10 Component section
226	11.11 Net attribute section 11.12 Netlist section
228	11.13 Via section
229	11.14 Bondwire section
230	11.15 Route section
234	Annex A (informative) Bibliography
236	Annex B (informative) Examples of utilization B.1 Understanding the function of the LPB Format B.2 Test bench
238	B.3 Design flow example
270	B.4 Growth of the sample files in the LPB Format
274	B.5 Simulations using the sample files in the LPB Format
276	Annex C (informative) XML Encryption
279	Annex D (informative) MD5 checksum
280	Annex E (informative) Chip-Package Interface Protocol E.1 General E.2 Comparison of C-Format with Chip-Package Interface Protocol
285	Annex F (informative) M-Format usage examples F.1 General F.2 Bundling files for a product
286	F.3 Bundling files for a library
288	F.4 Managing design versions using M-Format
289	Annex G (informative) Example of how to express the connector parts as terminals G.1 General
293	Back cover