IEEE 370-2020
$91.54
IEEE Standard for Electrical Characterization of Printed Circuit Board and Related Interconnects at Frequencies up to 50 GHz
Published By | Publication Date | Number of Pages |
IEEE | 2020 | 147 |
New IEEE Standard – Active. Standard and recommended practices for ensuring the quality of measured data for high-frequency electrical interconnect at frequencies up to 50 GHz are provided. This might include, but is not limited to recommending design of test fixtures, as well as methods and processes for ensuring the accuracy and consistency of measured data for signals with frequency content up to 50 GHz. The standard and general practice should be applicable for frequencies higher than 50 GHz as well. The methods and techniques contained herein have been validated only to 50 GHz as of this writing. (This standard incorporates open source. See https://opensource.ieee.org/elec-char/ieee-370/)
PDF Catalog
PDF Pages | PDF Title |
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1 | Developed by the |
2 | Title page |
4 | Important Notices and Disclaimers Concerning IEEE Standards Documents |
8 | Participants |
10 | Introduction |
11 | Contents |
14 | 1. Overview 1.1 Introduction 1.2 Scope |
15 | 1.3 Purpose 1.4 Word usage 2. Normative references |
16 | 3. Definitions, acronyms, and abbreviations 3.1 Definitions |
18 | 3.2 S-parameter terms and labeling conventions 3.2.1 Introduction 3.2.2 Port index labeling |
20 | 3.2.3 Labeling fixtures with two or four ports |
22 | 3.3 Defining the calibration method used and the component measured 3.3.1 Introduction 3.3.2 Calibration methods |
23 | 3.3.3 Traceable calibration method 3.3.4 Using a traceable calibration with microprobes |
24 | 3.4 De-embedding method 3.5 Normative header information in the TouchstoneTM file 3.5.1 Introduction |
25 | 3.5.2 Data source 3.5.3 Post-processing 3.5.4 Component type |
26 | 3.5.5 Calibration method 3.5.6 De-embedding method 3.5.7 Port assignment 3.5.8 Fixture electrical requirements 3.5.9 S-parameter quality metrics 3.5.10 Touchstone file header reporting requirements summary |
27 | 3.5.11 Touchstone file header example |
28 | 4. Test fixture design criteria 4.1 Overview |
29 | 4.2 Fixture design requirements (FDR) (normative) 4.2.1 Introduction 4.2.2 Single-ended de-embedding 4.2.3 2X-Thru |
30 | 4.2.4 Mixed-mode de-embedding 4.2.5 Single-ended fixture crosstalk |
31 | 4.2.6 Interpair (pair to pair) fixture crosstalk |
32 | 4.3 Fixture electrical requirements (FER) 4.3.1 Introduction 4.3.2 Class definitions |
33 | 4.3.3 FER compliance 4.3.4 FER1: Insertion loss of 2X-Thru 4.3.5 FER2: Return loss of 2X-Thru 4.3.6 FER3: Insertion loss and return loss separation 4.3.7 FER4: Intra-fixture crosstalk |
34 | 4.3.8 FER5: Impedance variation: Difference between the FIX in 2X-Thru and the FIX-DUT-FIX 4.3.9 FER6: Difference between differential to common mode conversion loss and insertion loss |
35 | 4.3.10 FER7: Line to line or pair to pair phase skew 4.3.11 FER8: Minimum length of 2X-Thru 4.3.12 FER summary |
37 | 4.4 Design documentation |
38 | 5. De-embedding verification 5.1 Introduction |
39 | 5.2 Overview 5.2.1 Introduction 5.2.2 Option 1 analysis: Synthesized libraries |
40 | 5.2.3 Option 2 analysis: Plug-and-play boards 5.2.4 Option 3 analysis: Demonstration boards 5.3 Option 1: De-embedding verification using the S-parameter library 5.3.1 Purpose |
41 | 5.3.2 Testing a de-embedding process with S-parameter library (approach 1) |
43 | 5.3.3 Testing a de-embedding algorithm with S-parameter library (approach 2) |
45 | 5.4 Option 2: De-embedding verification using separately measurable component test board measurements (plug-and-play modules) 5.4.1 Overview |
46 | 5.5 Option 3: De-embedding verification using test board measurement 5.5.1 Overview |
48 | 5.5.2 Example of the results 5.6 Evaluation of the actual DUT and de-embedded DUT 5.7 Reporting method for the accuracy of a de-embedding algorithm 5.7.1 Introduction |
49 | 5.7.2 Special consideration |
50 | 6. Consistency tests of a measurement and de-embedding process 6.1 Purpose 6.2 Instrument verification 6.3 Fixture S-parameter quality check |
51 | 6.4 Fixture design quality check 6.5 Consistency tests 6.5.1 Introduction 6.5.2 Consistency test #1: (normative) Self de-embedding of 2X-Thru |
52 | 6.5.3 Consistency test #2: (normative) Compare the TDR of the fixture model to the FIX-DUT-FIX |
54 | 6.5.4 Consistency test #3: (informative) Compare a DUT-DUT measurement with two concatenated DUT models 6.5.5 Consistency test #4: (informative) Consistency tests based on verification structures 6.5.6 Other consistency tests (informative) |
55 | 6.6 Methods to determine the similarity of S-parameters |
56 | 7. S-parameter integrity and validation 7.1 Scope |
58 | 7.2 Best practice: Maximum frequency extrapolation methodology |
59 | 7.3 Initial quality checking of raw data 7.3.1 Introduction 7.3.2 Initial passivity checking of raw data at the given frequency samples 7.3.3 Initial causality checking of raw data at the given frequency samples |
60 | 7.3.4 Initial reciprocity checking of raw data at the given frequency samples 7.4 Application-based quality checking 7.4.1 Introduction |
61 | 7.4.2 Checking frequency resolution 7.4.3 Application-based passivity checking of raw data 7.4.4 Application-based causality checking of raw data |
62 | 7.4.5 Application-based reciprocity checking of raw data |
63 | Annex A (informative) Bibliography |
66 | Annex B (informative) Tutorial (Network parameters in general |
73 | Annex C (informative) Tutorial (Mixed-mode network parameters |
75 | Annex D (informative) Tutorial (Calibration and de-embedding basics D.1 Overview D.2 Calibration with coaxial connection D.3 Thru-reflect-line (TRL) |
76 | D.4 De-embedding past the calibration plane D.5 De-embedding tools overview |
77 | D.6 Overview of generic de-embedding methods |
79 | D.7 Mixed-mode fixture model calculation D.8 Example implementation |
80 | Annex E (informative) Test fixture definition E.1 Overview |
81 | E.2 Single-ended de-embedding |
84 | E.3 Differential de-embedding |
86 | Annex F (informative) Verification structures F.1 Beatty structure |
88 | F.2 Verification line structure |
89 | Annex G (informative) Methods for comparison of S-parameters G.1 Error vector method |
90 | G.2 Integrated energy relative error method |
91 | G.3 Feature selective validation (FSV) method G.4 Time-domain step response method |
92 | Annex H (informative) Initial quality checking of raw S-parameter data H.1 Introduction H.2 Initial passivity checking of raw data at the given frequency samples |
93 | H.3 Initial causality checking of raw data at the given frequency samples |
95 | H.4 Initial reciprocity checking of raw data at the given frequency samples |
97 | Annex I (normative) Application-based quality checking of raw S-parameter data I.1 Application-based passivity checking of raw data |
102 | I.2 Application-based causality checking of raw data |
107 | I.3 Application-based reciprocity checking of raw data |
108 | Annex J (informative) Best practice: Design and manufacturing considerations J.1 Overview J.2 Via design |
112 | J.3 Intra-pair trace coupling (differential case) J.4 Trace routing J.5 Microstrip plating |
113 | J.6 PCB manufacturer choice J.7 Copper thieving J.8 Copper surface roughness |
114 | Annex K (informative) Best practice: Fixture design K.1 Overview K.2 Launch design K.3 Stitching vias to minimize cavity resonance K.4 Ground plane cutouts (anti-pads) K.5 Return path vias at DUT |
115 | K.6 Torque wrench and coax cable access K.7 Microprobe footprints K.8 Using multiple test fixtures |
116 | Annex L (informative) Best practice: Measurement guidance L.1 Measurement equipment L.2 Coaxial cable and connectors L.3 Environment |
117 | Annex M (informative) S-parameter library M.1 Vertical launch connectors |
118 | M.2 Lead-in structures M.3 Device under test (DUT) elements |
120 | Annex N (informative) Example: Typical application of the synthesized S-parameter library N.1 Overview N.2 Comparing the original data and de-embedded data |
121 | N.3 Example 1: Case 01-01, vertically launched connector (VLC) top-to-bottom via, long fixture, short DUT |
122 | N.4 Example 2: Case 01-03, tightly coupled microstrip fixture with long via stubs |
124 | N.5 Example 3: Case 01-05, striplines and short vias |
125 | N.6 Example 4: Case 14-05, stripline fixture with 105 Ohm fixture |
128 | Annex O (informative) Example: Sensitivity analysis testing with synthesized S-parameter models |
131 | Annex P (informative) Reference: Synthesized S-parameter library and circuits in the Quite Universal Circuit Simulator library |
132 | Annex Q (informative) Example: Plug-and-play test boards kit with separable connectors |
137 | Annex R (informative) Example: Test typical manufactured board design R.1 Board design feature: Replicated device under test and fixtures (manufacturing variation) |
138 | R.2 Board design feature: DUT-DUT structures |
139 | Annex S (informative) Best practice: Analytically creating an input pulse S.1 Method 1: Gaussian pulse |
140 | S.2 Method 2: Rectangular pulse with first-order Butterworth filter |
142 | Annex T (informative) Best practice: DC extrapolation methodology |
144 | Annex U (informative) Best practice: Interpolation methodology U.1 Part 1: Linear interpolation |
145 | U.2 Part 2: Approximation with rational fitting |