{"id":423602,"date":"2024-10-20T06:47:23","date_gmt":"2024-10-20T06:47:23","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-iec-61691-62021\/"},"modified":"2024-10-26T12:44:35","modified_gmt":"2024-10-26T12:44:35","slug":"bs-iec-61691-62021","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-iec-61691-62021\/","title":{"rendered":"BS IEC 61691-6:2021"},"content":{"rendered":"

This standard defines the IEEE 1076.1\u2122 language, a hardware description language for the description and the simulation of analog, digital, and mixed-signal systems. Informally called VHDL-AMS (VHSIC Hardware Description Language for Analog and Mixed-Signal, where VHSIC stands for Very High Speed Integrated Circuits), the language is built on the IEEE 1076\u2122 (VHDL) language and extends it to provide capabilities of writing and simulating analog and mixed-signal models.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
2<\/td>\nundefined <\/td>\n<\/tr>\n
4<\/td>\nContents <\/td>\n<\/tr>\n
17<\/td>\nIntroduction <\/td>\n<\/tr>\n
19<\/td>\n1. Overview
1.1 Scope
1.2 Purpose
1.3 Structure and terminology of this standard
1.3.1 General <\/td>\n<\/tr>\n
20<\/td>\n1.3.2 Syntactic description <\/td>\n<\/tr>\n
21<\/td>\n1.3.3 Semantic description
1.3.4 Front matter, examples, notes, references, and annexes
1.3.5 Incorporation of Property Specification Language <\/td>\n<\/tr>\n
22<\/td>\n2. Normative references <\/td>\n<\/tr>\n
23<\/td>\n3. Design entities and configurations
3.1 General
3.2 Entity declarations
3.2.1 General <\/td>\n<\/tr>\n
24<\/td>\n3.2.2 Entity header
3.2.3 Entity declarative part <\/td>\n<\/tr>\n
26<\/td>\n3.2.4 Entity statement part
3.3 Architecture bodies
3.3.1 General <\/td>\n<\/tr>\n
27<\/td>\n3.3.2 Architecture declarative part <\/td>\n<\/tr>\n
28<\/td>\n3.3.3 Architecture statement part <\/td>\n<\/tr>\n
29<\/td>\n3.4 Configuration declarations
3.4.1 General <\/td>\n<\/tr>\n
30<\/td>\n3.4.2 Block configuration <\/td>\n<\/tr>\n
33<\/td>\n3.4.3 Component configuration <\/td>\n<\/tr>\n
36<\/td>\n4. Subprograms and packages
4.1 General
4.2 Subprogram declarations
4.2.1 General <\/td>\n<\/tr>\n
37<\/td>\n4.2.2 Formal parameters
4.2.2.1 Formal parameter lists <\/td>\n<\/tr>\n
38<\/td>\n4.2.2.2 Constant and variable parameters <\/td>\n<\/tr>\n
39<\/td>\n4.2.2.3 Signal parameters <\/td>\n<\/tr>\n
40<\/td>\n4.2.2.4 File parameters
4.3 Subprogram bodies <\/td>\n<\/tr>\n
43<\/td>\n4.4 Subprogram instantiation declarations <\/td>\n<\/tr>\n
44<\/td>\n4.5 Subprogram overloading
4.5.1 General <\/td>\n<\/tr>\n
45<\/td>\n4.5.2 Operator overloading
4.5.3 Signatures <\/td>\n<\/tr>\n
46<\/td>\n4.6 Resolution functions <\/td>\n<\/tr>\n
47<\/td>\n4.7 Package declarations <\/td>\n<\/tr>\n
49<\/td>\n4.8 Package bodies <\/td>\n<\/tr>\n
50<\/td>\n4.9 Package instantiation declarations <\/td>\n<\/tr>\n
51<\/td>\n4.10 Conformance rules <\/td>\n<\/tr>\n
52<\/td>\n5. Types and natures
5.1 General <\/td>\n<\/tr>\n
53<\/td>\n5.2 Scalar types
5.2.1 General <\/td>\n<\/tr>\n
54<\/td>\n5.2.2 Enumeration types
5.2.2.1 General <\/td>\n<\/tr>\n
55<\/td>\n5.2.2.2 Predefined enumeration types
5.2.3 Integer types
5.2.3.1 General <\/td>\n<\/tr>\n
56<\/td>\n5.2.3.2 Predefined integer types
5.2.4 Physical types
5.2.4.1 General <\/td>\n<\/tr>\n
58<\/td>\n5.2.4.2 Predefined physical types <\/td>\n<\/tr>\n
59<\/td>\n5.2.5 Floating-point types
5.2.5.1 General <\/td>\n<\/tr>\n
60<\/td>\n5.2.5.2 Predefined floating-point types
5.2.6 Predefined operations on scalar types <\/td>\n<\/tr>\n
61<\/td>\n5.3 Composite types
5.3.1 General <\/td>\n<\/tr>\n
62<\/td>\n5.3.2 Array types
5.3.2.1 General <\/td>\n<\/tr>\n
64<\/td>\n5.3.2.2 Index constraints and discrete ranges <\/td>\n<\/tr>\n
67<\/td>\n5.3.2.3 Predefined array types <\/td>\n<\/tr>\n
68<\/td>\n5.3.2.4 Predefined operations on array types <\/td>\n<\/tr>\n
69<\/td>\n5.3.3 Record types <\/td>\n<\/tr>\n
71<\/td>\n5.4 Access types
5.4.1 General
5.4.2 Incomplete type declarations <\/td>\n<\/tr>\n
72<\/td>\n5.4.3 Allocation and deallocation of objects <\/td>\n<\/tr>\n
73<\/td>\n5.5 File types
5.5.1 General
5.5.2 File operations <\/td>\n<\/tr>\n
76<\/td>\n5.6 Protected types
5.6.1 Protected type definitions
5.6.2 Protected type declarations <\/td>\n<\/tr>\n
77<\/td>\n5.6.3 Protected type bodies <\/td>\n<\/tr>\n
79<\/td>\n5.7 String representations <\/td>\n<\/tr>\n
80<\/td>\n5.8 Natures
5.8.1 General
5.8.2 Scalar natures <\/td>\n<\/tr>\n
81<\/td>\n5.8.3 Composite natures
5.8.3.1 General
5.8.3.2 Array natures <\/td>\n<\/tr>\n
82<\/td>\n5.8.3.3 Record natures <\/td>\n<\/tr>\n
85<\/td>\n6. Declarations
6.1 General <\/td>\n<\/tr>\n
86<\/td>\n6.2 Type declarations
6.3 Subtype declarations <\/td>\n<\/tr>\n
88<\/td>\n6.4 Objects
6.4.1 General <\/td>\n<\/tr>\n
89<\/td>\n6.4.2 Object declarations
6.4.2.1 General <\/td>\n<\/tr>\n
90<\/td>\n6.4.2.2 Constant declarations
6.4.2.3 Signal declarations <\/td>\n<\/tr>\n
92<\/td>\n6.4.2.4 Variable declarations <\/td>\n<\/tr>\n
94<\/td>\n6.4.2.5 File declarations <\/td>\n<\/tr>\n
95<\/td>\n6.4.2.6 Terminal declarations <\/td>\n<\/tr>\n
96<\/td>\n6.4.2.7 Quantity declarations <\/td>\n<\/tr>\n
99<\/td>\n6.5 Interface declarations
6.5.1 General
6.5.2 Interface object declarations <\/td>\n<\/tr>\n
102<\/td>\n6.5.3 Interface type and interface nature declarations
6.5.3.1 Interface type declarations
6.5.3.2 Interface nature declarations <\/td>\n<\/tr>\n
103<\/td>\n6.5.4 Interface subprogram declarations <\/td>\n<\/tr>\n
104<\/td>\n6.5.5 Interface package declarations
6.5.6 Interface lists
6.5.6.1 General <\/td>\n<\/tr>\n
105<\/td>\n6.5.6.2 Generic clauses <\/td>\n<\/tr>\n
106<\/td>\n6.5.6.3 Port clauses <\/td>\n<\/tr>\n
108<\/td>\n6.5.7 Association lists
6.5.7.1 General <\/td>\n<\/tr>\n
111<\/td>\n6.5.7.2 Generic map aspects <\/td>\n<\/tr>\n
115<\/td>\n6.5.7.3 Port map aspects <\/td>\n<\/tr>\n
117<\/td>\n6.6 Alias declarations
6.6.1 General
6.6.2 Object aliases <\/td>\n<\/tr>\n
118<\/td>\n6.6.3 Nonobject aliases <\/td>\n<\/tr>\n
120<\/td>\n6.7 Attribute declarations <\/td>\n<\/tr>\n
121<\/td>\n6.8 Component declarations
6.9 Group template declarations
6.10 Group declarations <\/td>\n<\/tr>\n
122<\/td>\n6.11 Nature and subnature declarations <\/td>\n<\/tr>\n
123<\/td>\n6.12 PSL clock declarations <\/td>\n<\/tr>\n
124<\/td>\n7. Specifications
7.1 General
7.2 Attribute specification <\/td>\n<\/tr>\n
127<\/td>\n7.3 Configuration specification
7.3.1 General <\/td>\n<\/tr>\n
128<\/td>\n7.3.2 Binding indication
7.3.2.1 General <\/td>\n<\/tr>\n
130<\/td>\n7.3.2.2 Entity aspect <\/td>\n<\/tr>\n
131<\/td>\n7.3.3 Default binding indication <\/td>\n<\/tr>\n
132<\/td>\n7.3.4 Verification unit binding indication <\/td>\n<\/tr>\n
133<\/td>\n7.4 Disconnection specification <\/td>\n<\/tr>\n
135<\/td>\n7.5 Step limit specification <\/td>\n<\/tr>\n
138<\/td>\n8. Names
8.1 General <\/td>\n<\/tr>\n
139<\/td>\n8.2 Simple names <\/td>\n<\/tr>\n
140<\/td>\n8.3 Selected names <\/td>\n<\/tr>\n
142<\/td>\n8.4 Indexed names <\/td>\n<\/tr>\n
143<\/td>\n8.5 Slice names
8.6 Attribute names <\/td>\n<\/tr>\n
144<\/td>\n8.7 External names <\/td>\n<\/tr>\n
148<\/td>\n9. Expressions
9.1 General <\/td>\n<\/tr>\n
149<\/td>\n9.2 Operators
9.2.1 General <\/td>\n<\/tr>\n
150<\/td>\n9.2.2 Logical operators <\/td>\n<\/tr>\n
151<\/td>\n9.2.3 Relational operators <\/td>\n<\/tr>\n
154<\/td>\n9.2.4 Shift operators <\/td>\n<\/tr>\n
156<\/td>\n9.2.5 Adding operators <\/td>\n<\/tr>\n
158<\/td>\n9.2.6 Sign operators
9.2.7 Multiplying operators <\/td>\n<\/tr>\n
160<\/td>\n9.2.8 Miscellaneous operators <\/td>\n<\/tr>\n
161<\/td>\n9.2.9 Condition operator <\/td>\n<\/tr>\n
162<\/td>\n9.3 Operands
9.3.1 General
9.3.2 Literals <\/td>\n<\/tr>\n
163<\/td>\n9.3.3 Aggregates
9.3.3.1 General <\/td>\n<\/tr>\n
164<\/td>\n9.3.3.2 Record aggregates
9.3.3.3 Array aggregates <\/td>\n<\/tr>\n
167<\/td>\n9.3.4 Function calls
9.3.5 Qualified expressions <\/td>\n<\/tr>\n
168<\/td>\n9.3.6 Type conversions <\/td>\n<\/tr>\n
169<\/td>\n9.3.7 Allocators <\/td>\n<\/tr>\n
170<\/td>\n9.4 Static expressions
9.4.1 General
9.4.2 Locally static primaries <\/td>\n<\/tr>\n
172<\/td>\n9.4.3 Globally static primaries <\/td>\n<\/tr>\n
174<\/td>\n9.5 Universal expressions
9.6 Linear forms <\/td>\n<\/tr>\n
177<\/td>\n10 Sequential statements
10.1 General
10.2 Wait statement <\/td>\n<\/tr>\n
179<\/td>\n10.3 Assertion statement <\/td>\n<\/tr>\n
180<\/td>\n10.4 Report statement <\/td>\n<\/tr>\n
181<\/td>\n10.5 Signal assignment statement
10.5.1 General
10.5.2 Simple signal assignments
10.5.2.1 General <\/td>\n<\/tr>\n
184<\/td>\n10.5.2.2 Executing a simple assignment statement <\/td>\n<\/tr>\n
187<\/td>\n10.5.3 Conditional signal assignments <\/td>\n<\/tr>\n
190<\/td>\n10.5.4 Selected signal assignments <\/td>\n<\/tr>\n
192<\/td>\n10.6 Variable assignment statement
10.6.1 General
10.6.2 Simple variable assignments
10.6.2.1 General <\/td>\n<\/tr>\n
193<\/td>\n10.6.2.2 Composite variable assignments
10.6.3 Conditional variable assignments <\/td>\n<\/tr>\n
195<\/td>\n10.6.4 Selected variable assignments <\/td>\n<\/tr>\n
196<\/td>\n10.7 Procedure call statement
10.8 If statement <\/td>\n<\/tr>\n
197<\/td>\n10.9 Case statement <\/td>\n<\/tr>\n
199<\/td>\n10.10 Loop statement
10.11 Next statement <\/td>\n<\/tr>\n
200<\/td>\n10.12 Exit statement
10.13 Return statement <\/td>\n<\/tr>\n
201<\/td>\n10.14 Null statement
10.15 Break statement <\/td>\n<\/tr>\n
202<\/td>\n11. Architecture statements
11.1 General <\/td>\n<\/tr>\n
203<\/td>\n11.2 Block statement <\/td>\n<\/tr>\n
204<\/td>\n11.3 Process statement <\/td>\n<\/tr>\n
206<\/td>\n11.4 Concurrent procedure call statements <\/td>\n<\/tr>\n
207<\/td>\n11.5 Concurrent assertion statements <\/td>\n<\/tr>\n
208<\/td>\n11.6 Concurrent signal assignment statements <\/td>\n<\/tr>\n
210<\/td>\n11.7 Component instantiation statements
11.7.1 General <\/td>\n<\/tr>\n
211<\/td>\n11.7.2 Instantiation of a component <\/td>\n<\/tr>\n
213<\/td>\n11.7.3 Instantiation of a design entity <\/td>\n<\/tr>\n
216<\/td>\n11.8 Generate statements <\/td>\n<\/tr>\n
218<\/td>\n11.9 Concurrent break statement <\/td>\n<\/tr>\n
219<\/td>\n11.10 Simple simultaneous statement <\/td>\n<\/tr>\n
220<\/td>\n11.11 Simultaneous if statement
11.12 Simultaneous case statement <\/td>\n<\/tr>\n
221<\/td>\n11.13 Simultaneous procedural statement <\/td>\n<\/tr>\n
224<\/td>\n11.14 Simultaneous null statement <\/td>\n<\/tr>\n
225<\/td>\n12. Scope and visibility
12.1 Declarative region
12.2 Scope of declarations <\/td>\n<\/tr>\n
227<\/td>\n12.3 Visibility <\/td>\n<\/tr>\n
231<\/td>\n12.4 Use clauses <\/td>\n<\/tr>\n
232<\/td>\n12.5 The context of overload resolution <\/td>\n<\/tr>\n
234<\/td>\n13. Design units and their analysis
13.1 Design units
13.2 Design libraries <\/td>\n<\/tr>\n
236<\/td>\n13.3 Context declarations
13.4 Context clauses <\/td>\n<\/tr>\n
237<\/td>\n13.5 Order of analysis <\/td>\n<\/tr>\n
238<\/td>\n14. Elaboration and execution
14.1 General
14.2 Elaboration of a design hierarchy <\/td>\n<\/tr>\n
242<\/td>\n14.3 Elaboration of a block, package, or subprogram header
14.3.1 General
14.3.2 Generic clause
14.3.3 Generic map aspect
14.3.3.1 General
14.3.3.2 Association elements for generic constants <\/td>\n<\/tr>\n
243<\/td>\n14.3.3.3 Association elements for generic types and natures
14.3.3.4 Association elements for generic subprograms
14.3.3.5 Association elements for generic packages
14.3.4 Port clause
14.3.5 Port map aspect <\/td>\n<\/tr>\n
245<\/td>\n14.4 Elaboration of a declarative part
14.4.1 General <\/td>\n<\/tr>\n
246<\/td>\n14.4.2 Elaboration of a declaration
14.4.2.1 General
14.4.2.2 Subprogram declarations, bodies, and instantiations
14.4.2.3 Type declarations <\/td>\n<\/tr>\n
247<\/td>\n14.4.2.4 Subtype declarations
14.4.2.5 Object declarations <\/td>\n<\/tr>\n
248<\/td>\n14.4.2.6 Alias declarations
14.4.2.7 Attribute declarations <\/td>\n<\/tr>\n
249<\/td>\n14.4.2.8 Component declarations
14.4.2.9 Packages
14.4.2.10 Nature and subnature declarations
14.4.3 Elaboration of a specification
14.4.3.1 General
14.4.3.2 Attribute specifications <\/td>\n<\/tr>\n
250<\/td>\n14.4.3.3 Configuration specifications
14.4.3.4 Disconnection specifications
14.4.3.5 Step limit specifications
14.5 Elaboration of a statement part
14.5.1 General <\/td>\n<\/tr>\n
251<\/td>\n14.5.2 Block statements
14.5.3 Generate statements <\/td>\n<\/tr>\n
253<\/td>\n14.5.4 Component instantiation statements
14.5.5 Other concurrent statements <\/td>\n<\/tr>\n
254<\/td>\n14.5.6 Simultaneous statements
14.6 Dynamic elaboration <\/td>\n<\/tr>\n
255<\/td>\n14.7 Execution of a model
14.7.1 General
14.7.2 Drivers <\/td>\n<\/tr>\n
256<\/td>\n14.7.3 Propagation of signal values
14.7.3.1 General <\/td>\n<\/tr>\n
257<\/td>\n14.7.3.2 Driving values <\/td>\n<\/tr>\n
258<\/td>\n14.7.3.3 Effective values <\/td>\n<\/tr>\n
259<\/td>\n14.7.3.4 Signal update <\/td>\n<\/tr>\n
260<\/td>\n14.7.4 Updating implicit signals <\/td>\n<\/tr>\n
262<\/td>\n14.7.5 Model execution
14.7.5.1 General
14.7.5.2 Initialization <\/td>\n<\/tr>\n
263<\/td>\n14.7.5.3 Simulation cycle <\/td>\n<\/tr>\n
265<\/td>\n14.7.6 Augmentation sets
14.7.6.1 General
14.7.6.2 Quiescent state augmentation set <\/td>\n<\/tr>\n
266<\/td>\n14.7.6.3 Time domain augmentation set
14.7.6.4 Discontinuity augmentation set <\/td>\n<\/tr>\n
267<\/td>\n14.7.6.5 Frequency domain augmentation set <\/td>\n<\/tr>\n
268<\/td>\n14.7.6.6 Noise augmentation set
14.7.7 Analog solver
14.7.7.1 General <\/td>\n<\/tr>\n
270<\/td>\n14.7.7.2 Application of the break set
14.8 Time and the analog solver <\/td>\n<\/tr>\n
271<\/td>\n14.9 Frequency and noise calculation <\/td>\n<\/tr>\n
273<\/td>\n15. Lexical elements
15.1 General
15.2 Character set <\/td>\n<\/tr>\n
275<\/td>\n15.3 Lexical elements, separators, and delimiters <\/td>\n<\/tr>\n
277<\/td>\n15.4 Identifiers
15.4.1 General
15.4.2 Basic identifiers
15.4.3 Extended identifiers <\/td>\n<\/tr>\n
278<\/td>\n15.5 Abstract literals
15.5.1 General
15.5.2 Decimal literals
15.5.3 Based literals <\/td>\n<\/tr>\n
279<\/td>\n15.6 Character literals
15.7 String literals <\/td>\n<\/tr>\n
280<\/td>\n15.8 Bit string literals <\/td>\n<\/tr>\n
282<\/td>\n15.9 Comments <\/td>\n<\/tr>\n
283<\/td>\n15.10 Reserved words <\/td>\n<\/tr>\n
285<\/td>\n15.11 Tool directives <\/td>\n<\/tr>\n
286<\/td>\n16. Predefined language environment
16.1 General
16.2 Predefined attributes
16.2.1 General
16.2.2 Predefined attributes of types and objects <\/td>\n<\/tr>\n
289<\/td>\n16.2.3 Predefined attributes of arrays <\/td>\n<\/tr>\n
291<\/td>\n16.2.4 Predefined attributes of signals <\/td>\n<\/tr>\n
294<\/td>\n16.2.5 Predefined attributes of named entities <\/td>\n<\/tr>\n
300<\/td>\n16.2.6 Predefined analog and mixed-signal attributes <\/td>\n<\/tr>\n
308<\/td>\n16.3 Package STANDARD <\/td>\n<\/tr>\n
323<\/td>\n16.4 Package TEXTIO <\/td>\n<\/tr>\n
329<\/td>\n16.5 Standard environment package <\/td>\n<\/tr>\n
330<\/td>\n16.6 Standard mathematical packages <\/td>\n<\/tr>\n
331<\/td>\n16.7 Standard multivalue logic package
16.8 Standard synthesis packages
16.8.1 Overview
16.8.1.1 Scope <\/td>\n<\/tr>\n
332<\/td>\n16.8.1.2 Terminology
16.8.2 Interpretation of the standard logic types
16.8.2.1 General
16.8.2.2 The STD_LOGIC_1164 values <\/td>\n<\/tr>\n
333<\/td>\n16.8.2.3 Static constant values
16.8.2.4 Interpretation of logic values <\/td>\n<\/tr>\n
335<\/td>\n16.8.3 The STD_MATCH function and predefined matching relational operators
16.8.4 Signal edge detection
16.8.5 Packages for arithmetic using bit and standard logic values
16.8.5.1 General <\/td>\n<\/tr>\n
336<\/td>\n16.8.5.2 Allowable modifications <\/td>\n<\/tr>\n
337<\/td>\n16.8.5.3 Compatibility with previous editions of IEEE Std 1076
16.8.5.4 The package texts
16.9 Standard synthesis context declarations <\/td>\n<\/tr>\n
338<\/td>\n16.10 Fixed-point package
16.11 Floating-point package <\/td>\n<\/tr>\n
339<\/td>\n16.12 Standard packages for multiple energy domain support
16.12.1 Scope
16.12.2 Organization of the packages
16.12.3 The package texts <\/td>\n<\/tr>\n
340<\/td>\n17. VHDL Procedural Interface overview
17.1 General
17.2 Organization of the interface
17.2.1 General <\/td>\n<\/tr>\n
341<\/td>\n17.2.2 VHPI naming conventions
17.3 Capability sets <\/td>\n<\/tr>\n
343<\/td>\n17.4 Handles
17.4.1 General
17.4.2 Handle creation
17.4.3 Handle release <\/td>\n<\/tr>\n
344<\/td>\n17.4.4 Handle comparison
17.4.5 Validity of handles <\/td>\n<\/tr>\n
345<\/td>\n18. VHPI access functions
18.1 General
18.2 Information access functions
18.2.1 General
18.2.2 One-to-one association traversal <\/td>\n<\/tr>\n
346<\/td>\n18.2.3 One-to-many association traversal <\/td>\n<\/tr>\n
347<\/td>\n18.3 Property access functions
18.3.1 General
18.3.2 Integer and Boolean property access function
18.3.3 String property access function <\/td>\n<\/tr>\n
348<\/td>\n18.3.4 Real property access function
18.3.5 Physical property access function
18.4 Access by name function <\/td>\n<\/tr>\n
349<\/td>\n19. VHPI information model
19.1 General
19.2 Formal notation
19.2.1 General
19.2.2 Machine-readable information model <\/td>\n<\/tr>\n
350<\/td>\n19.3 Class inheritance hierarchy <\/td>\n<\/tr>\n
351<\/td>\n19.4 Name properties
19.4.1 General
19.4.2 Implicit labels of statements
19.4.2.1 General
19.4.2.2 Implicit labels of loop statements <\/td>\n<\/tr>\n
352<\/td>\n19.4.2.3 Implicit labels of concurrent statements
19.4.3 The Name and CaseName properties <\/td>\n<\/tr>\n
357<\/td>\n19.4.4 The SignatureName property
19.4.5 The UnitName property
19.4.6 The DefName and DefCaseName properties <\/td>\n<\/tr>\n
361<\/td>\n19.4.7 The FullName and FullCaseName properties <\/td>\n<\/tr>\n
364<\/td>\n19.4.8 The PathName and InstanceName properties
19.5 The stdUninstantiated package <\/td>\n<\/tr>\n
367<\/td>\n19.6 The stdHierarchy package <\/td>\n<\/tr>\n
374<\/td>\n19.7 The stdTypes package <\/td>\n<\/tr>\n
376<\/td>\n19.8 The stdExpr package <\/td>\n<\/tr>\n
379<\/td>\n19.9 The stdSpec package <\/td>\n<\/tr>\n
381<\/td>\n19.10 The stdSubprograms package <\/td>\n<\/tr>\n
383<\/td>\n19.11 The stdStmts package <\/td>\n<\/tr>\n
389<\/td>\n19.12 The stdConnectivity package
19.12.1 Class diagrams <\/td>\n<\/tr>\n
392<\/td>\n19.12.2 Contributors, loads, and simulated nets
19.12.2.1 General <\/td>\n<\/tr>\n
393<\/td>\n19.12.2.2 Local contributors <\/td>\n<\/tr>\n
394<\/td>\n19.12.2.3 Local loads
19.12.2.4 Simulated nets
19.13 The stdCallbacks package <\/td>\n<\/tr>\n
395<\/td>\n19.14 The stdEngine package
19.15 The stdForeign package
19.16 The stdMeta package <\/td>\n<\/tr>\n
397<\/td>\n19.17 The stdTool package <\/td>\n<\/tr>\n
398<\/td>\n19.18 Application contexts <\/td>\n<\/tr>\n
399<\/td>\n20. VHPI tool execution
20.1 General
20.2 Registration phase
20.2.1 General <\/td>\n<\/tr>\n
400<\/td>\n20.2.2 Registration using a tabular registry <\/td>\n<\/tr>\n
402<\/td>\n20.2.3 Registration using registration functions <\/td>\n<\/tr>\n
403<\/td>\n20.2.4 Foreign attribute for foreign models
20.2.4.1 General
20.2.4.2 Standard indirect binding <\/td>\n<\/tr>\n
404<\/td>\n20.2.4.3 Standard direct binding <\/td>\n<\/tr>\n
405<\/td>\n20.3 Analysis phase
20.4 Elaboration phase
20.4.1 General <\/td>\n<\/tr>\n
406<\/td>\n20.4.2 Dynamic elaboration <\/td>\n<\/tr>\n
407<\/td>\n20.5 Initialization phase
20.6 Simulation phase
20.7 Save phase <\/td>\n<\/tr>\n
408<\/td>\n20.8 Restart phase
20.9 Reset phase <\/td>\n<\/tr>\n
409<\/td>\n20.10 Termination phase <\/td>\n<\/tr>\n
410<\/td>\n21. VHPI callbacks
21.1 General
21.2 Callback functions
21.2.1 General
21.2.2 Registering callbacks <\/td>\n<\/tr>\n
411<\/td>\n21.2.3 Enabling and disabling callbacks
21.2.4 Removing callbacks
21.2.5 Callback information
21.2.6 Execution of callbacks <\/td>\n<\/tr>\n
412<\/td>\n21.3 Callback reasons
21.3.1 General
21.3.2 Object callbacks
21.3.2.1 General <\/td>\n<\/tr>\n
413<\/td>\n21.3.2.2 vhpiCbValueChange
21.3.2.3 vhpiCbForce <\/td>\n<\/tr>\n
414<\/td>\n21.3.2.4 vhpiCbRelease
21.3.2.5 vhpiCbTransaction
21.3.3 Foreign model callbacks
21.3.3.1 General
21.3.3.2 vhpiCbTimeOut and vhpiCbRepTimeOut <\/td>\n<\/tr>\n
415<\/td>\n21.3.3.3 vhpiCbSensitivity <\/td>\n<\/tr>\n
416<\/td>\n21.3.4 Statement callbacks
21.3.4.1 General
21.3.4.2 vhpiCbStmt <\/td>\n<\/tr>\n
417<\/td>\n21.3.4.3 vhpiCbResume
21.3.4.4 vhpiCbSuspend
21.3.4.5 vhpiCbStartOfSubpCall <\/td>\n<\/tr>\n
418<\/td>\n21.3.4.6 vhpiCbEndOfSubpCall
21.3.5 Time callbacks
21.3.5.1 General
21.3.5.2 vhpiCbAfterDelay and vhpiCbRepAfterDelay <\/td>\n<\/tr>\n
419<\/td>\n21.3.6 Simulation phase callbacks
21.3.6.1 General
21.3.6.2 vhpiCbNextTimeStep and vhpiCbRepNextTimeStep
21.3.6.3 vhpiCbStartOfNextCycle and vhpiCbRepStartOfNextCycle
21.3.6.4 vhpiCbStartOfProcesses and vhpiCbRepStartOfProcesses
21.3.6.5 vhpiCbEndOfProcesses and vhpiCbRepEndOfProcesses
21.3.6.6 vhpiCbLastKnownDeltaCycle and vhpiCbRepLastKnownDeltaCycle
21.3.6.7 vhpiCbStartOfPostponed and vhpiCbRepStartOfPostponed
21.3.6.8 vhpiCbEndOfTimeStep and vhpiCbRepEndOfTimeStep <\/td>\n<\/tr>\n
420<\/td>\n21.3.7 Action callbacks
21.3.7.1 General
21.3.7.2 vhpiCbStartOfTool and vhpiCbEndOfTool
21.3.7.3 vhpiCbStartOfAnalysis and vhpiCbEndOfAnalysis
21.3.7.4 vhpiCbStartOfElaboration and vhpiCbEndOfElaboration
21.3.7.5 vhpiCbStartOfInitialization and vhpiCbEndOfInitialization <\/td>\n<\/tr>\n
421<\/td>\n21.3.7.6 vhpiCbStartOfSimulation and vhpiCbEndOfSimulation
21.3.7.7 vhpiCbQuiescense
21.3.7.8 vhpiCbEnterInteractive
21.3.7.9 vhpiCbExitInteractive
21.3.7.10 vhpiCbSigInterrupt <\/td>\n<\/tr>\n
422<\/td>\n21.3.8 Save, restart, and reset callbacks
21.3.8.1 General
21.3.8.2 vhpiCbStartOfSave and vhpiCbEndOfSave
21.3.8.3 vhpiCbStartOfRestart and vhpiCbEndOfRestart <\/td>\n<\/tr>\n
423<\/td>\n21.3.8.4 vhpiCbStartOfReset and vhpiCbEndOfReset <\/td>\n<\/tr>\n
424<\/td>\n22. VHPI value access and update
22.1 General
22.2 Value structures and types
22.2.1 General
22.2.2 vhpiEnumT and vhpiSmallEnumT
22.2.3 vhpiIntT and vhpiLongIntT
22.2.4 vhpiCharT
22.2.5 vhpiRealT
22.2.6 vhpiPhysT and vhpiSmallPhysT <\/td>\n<\/tr>\n
425<\/td>\n22.2.7 vhpiTimeT
22.2.8 vhpiValueT <\/td>\n<\/tr>\n
427<\/td>\n22.3 Reading object values <\/td>\n<\/tr>\n
428<\/td>\n22.4 Formatting values <\/td>\n<\/tr>\n
430<\/td>\n22.5 Updating object values
22.5.1 General <\/td>\n<\/tr>\n
431<\/td>\n22.5.2 Updating an object of class variable
22.5.3 Updating an object of class signal <\/td>\n<\/tr>\n
433<\/td>\n22.5.4 Updating an object of class driver <\/td>\n<\/tr>\n
434<\/td>\n22.5.5 Updating an object of class funcCall
22.6 Scheduling transactions on drivers <\/td>\n<\/tr>\n
437<\/td>\n23. VHPI function reference
23.1 General
23.2 vhpi_assert <\/td>\n<\/tr>\n
438<\/td>\n23.3 vhpi_check_error <\/td>\n<\/tr>\n
440<\/td>\n23.4 vhpi_compare_handles <\/td>\n<\/tr>\n
441<\/td>\n23.5 vhpi_control <\/td>\n<\/tr>\n
443<\/td>\n23.6 vhpi_create <\/td>\n<\/tr>\n
445<\/td>\n23.7 vhpi_disable_cb
23.8 vhpi_enable_cb <\/td>\n<\/tr>\n
446<\/td>\n23.9 vhpi_format_value <\/td>\n<\/tr>\n
448<\/td>\n23.10 vhpi_get
23.11 vhpi_get_cb_info <\/td>\n<\/tr>\n
449<\/td>\n23.12 vhpi_get_data <\/td>\n<\/tr>\n
451<\/td>\n23.13 vhpi_get_foreignf_info <\/td>\n<\/tr>\n
452<\/td>\n23.14 vhpi_get_next_time <\/td>\n<\/tr>\n
453<\/td>\n23.15 vhpi_get_phys <\/td>\n<\/tr>\n
454<\/td>\n23.16 vhpi_get_real <\/td>\n<\/tr>\n
455<\/td>\n23.17 vhpi_get_str
23.18 vhpi_get_time <\/td>\n<\/tr>\n
456<\/td>\n23.19 vhpi_get_value <\/td>\n<\/tr>\n
457<\/td>\n23.20 vhpi_handle <\/td>\n<\/tr>\n
458<\/td>\n23.21 vhpi_handle_by_index <\/td>\n<\/tr>\n
461<\/td>\n23.22 vhpi_handle_by_name <\/td>\n<\/tr>\n
463<\/td>\n23.23 vhpi_is_printable
23.24 vhpi_iterator <\/td>\n<\/tr>\n
464<\/td>\n23.25 vhpi_printf <\/td>\n<\/tr>\n
465<\/td>\n23.26 vhpi_protected_call <\/td>\n<\/tr>\n
467<\/td>\n23.27 vhpi_put_data <\/td>\n<\/tr>\n
469<\/td>\n23.28 vhpi_put_value <\/td>\n<\/tr>\n
470<\/td>\n23.29 vhpi_register_cb <\/td>\n<\/tr>\n
472<\/td>\n23.30 vhpi_register_foreignf <\/td>\n<\/tr>\n
474<\/td>\n23.31 vhpi_release_handle
23.32 vhpi_remove_cb <\/td>\n<\/tr>\n
475<\/td>\n23.33 vhpi_scan <\/td>\n<\/tr>\n
476<\/td>\n23.34 vhpi_schedule_transaction <\/td>\n<\/tr>\n
479<\/td>\n23.35 vhpi_vprintf <\/td>\n<\/tr>\n
480<\/td>\n24. Standard tool directives
24.1 Protect tool directives
24.1.1 General <\/td>\n<\/tr>\n
482<\/td>\n24.1.2 Protect directives
24.1.2.1 Protect begin directive
24.1.2.2 Protect end directive
24.1.2.3 Protect begin protected directive
24.1.2.4 Protect end protected directive
24.1.2.5 Protect author directive
24.1.2.6 Protect author info directive <\/td>\n<\/tr>\n
483<\/td>\n24.1.2.7 Protect encrypt agent directive
24.1.2.8 Protect encrypt agent info directive
24.1.2.9 Protect key keyowner directive
24.1.2.10 Protect key keyname directive
24.1.2.11 Protect key method directive
24.1.2.12 Protect key block directive <\/td>\n<\/tr>\n
484<\/td>\n24.1.2.13 Protect data keyowner directive
24.1.2.14 Protect data keyname directive
24.1.2.15 Protect data method directive
24.1.2.16 Protect data block directive
24.1.2.17 Protect digest keyowner directive
24.1.2.18 Protect digest keyname directive
24.1.2.19 Protect digest key method directive <\/td>\n<\/tr>\n
485<\/td>\n24.1.2.20 Protect digest method directive
24.1.2.21 Protect digest block directive
24.1.2.22 Protect encoding directive <\/td>\n<\/tr>\n
486<\/td>\n24.1.2.23 Protect viewport directive <\/td>\n<\/tr>\n
487<\/td>\n24.1.2.24 Protect license directives <\/td>\n<\/tr>\n
488<\/td>\n24.1.2.25 Protect comment directive
24.1.3 Encoding, encryption, and digest methods
24.1.3.1 Encoding methods <\/td>\n<\/tr>\n
489<\/td>\n24.1.3.2 Encryption methods <\/td>\n<\/tr>\n
490<\/td>\n24.1.3.3 Digest methods <\/td>\n<\/tr>\n
491<\/td>\n24.1.4 Encryption envelopes
24.1.4.1 General <\/td>\n<\/tr>\n
492<\/td>\n24.1.4.2 Encrypt key specifications
24.1.4.3 Encrypt data specifications <\/td>\n<\/tr>\n
493<\/td>\n24.1.4.4 Encrypt digest specifications
24.1.5 Decryption envelopes
24.1.5.1 General <\/td>\n<\/tr>\n
494<\/td>\n24.1.5.2 Decrypt key blocks <\/td>\n<\/tr>\n
495<\/td>\n24.1.5.3 Decrypt data blocks
24.1.5.4 Decrypt digest blocks <\/td>\n<\/tr>\n
496<\/td>\n24.1.6 Protection requirements for decryption tools <\/td>\n<\/tr>\n
497<\/td>\nAnnex A (informative) Description of accompanying files <\/td>\n<\/tr>\n
501<\/td>\nAnnex B (informative) VHPI header file <\/td>\n<\/tr>\n
527<\/td>\nAnnex C (informative) Syntax summary <\/td>\n<\/tr>\n
555<\/td>\nAnnex D (informative) Potentially nonportable constructs <\/td>\n<\/tr>\n
556<\/td>\nAnnex E (informative) Changes from IEEE Std 1076.1-2007 <\/td>\n<\/tr>\n
559<\/td>\nAnnex F (informative) Features under consideration for removal <\/td>\n<\/tr>\n
560<\/td>\nAnnex G (informative) Guide to use of standard packages <\/td>\n<\/tr>\n
598<\/td>\nAnnex H (informative) Guide to use of protect directives <\/td>\n<\/tr>\n
604<\/td>\nAnnex I (informative) Glossary <\/td>\n<\/tr>\n
633<\/td>\nAnnex J (informative) Bibliography <\/td>\n<\/tr>\n
636<\/td>\nIndex
A <\/td>\n<\/tr>\n
638<\/td>\nB <\/td>\n<\/tr>\n
640<\/td>\nC <\/td>\n<\/tr>\n
642<\/td>\nD <\/td>\n<\/tr>\n
645<\/td>\nE <\/td>\n<\/tr>\n
648<\/td>\nF <\/td>\n<\/tr>\n
650<\/td>\nG <\/td>\n<\/tr>\n
651<\/td>\nH
I <\/td>\n<\/tr>\n
654<\/td>\nJ
K
L <\/td>\n<\/tr>\n
655<\/td>\nM <\/td>\n<\/tr>\n
656<\/td>\nN <\/td>\n<\/tr>\n
658<\/td>\nO <\/td>\n<\/tr>\n
659<\/td>\nP <\/td>\n<\/tr>\n
662<\/td>\nQ
R <\/td>\n<\/tr>\n
664<\/td>\nS <\/td>\n<\/tr>\n
669<\/td>\nT <\/td>\n<\/tr>\n
671<\/td>\nU <\/td>\n<\/tr>\n
672<\/td>\nV <\/td>\n<\/tr>\n
675<\/td>\nW
X
Z <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

Behavioural languages – VHDL Analog and Mixed-Signal Extensions<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2021<\/td>\n676<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":423613,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[381,2641],"product_tag":[],"class_list":{"0":"post-423602","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-25-040-01","7":"product_cat-bsi","9":"first","10":"instock","11":"sold-individually","12":"shipping-taxable","13":"purchasable","14":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/423602","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/423613"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=423602"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=423602"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=423602"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}